[BALU] 64 bit systems

Jim Vines jgoodguy at charter.net
Fri Jun 8 11:22:39 CDT 2007


According to the wiki.   The address space is 48bits-physical plus 
virtual(paged?, swap?),  but the physical is 40 bits. 

"Current processor models implementing the AMD64 architecture can 
address up to 256 tebibytes of virtual address space (2 to the 48th  
bytes). This limit can be raised in future implementations to 16 
exbibytes (2 to the 64th  bytes). This is compared to just 4 gibibytes 
for 32-bit x86. This means that very large files can be operated on by 
mapping the entire file into the process' address space (which is 
generally faster than working with file read/write calls), rather than 
having to map regions of the file into and out of the address space."

"Current implementations of the AMD64 architecture can address up to 1 
tebibyte of RAM (2 to the 40th bytes); the architecture permits 
extending this to 4 pebibytes (2 to the 52th bytes) in the future 
(limited by the page table entry format). In legacy mode, Physical 
Address Extension (PAE) is supported, as it is on most current 32-bit 
x86 processors, allowing access to a maximum of 64 gibibytes."

http://en.wikipedia.org/wiki/X86-64

However keep in mind most motherboards have physical limits, number of 
slots and chip sets limits. 

The virtual address space combined with the efficient i/o to and from 
the HD for swap space, means that fast ram based data bases are usable 
into the 256,000 gigabyte range. 

Jim

Thomas Stover wrote:
> The physical address space is 48 bits, so that limits the amount of 
> real ram in the system. However from a process's point of view the 
> "virtual" address space is 64 bits, and that could still be utilized 
> with file mapping and /or  NUMA  machines.
>
> jim wrote:
>
>> Is not the address space only 48 bits, 256 terabytes
>> <http://en.wikipedia.org/wiki/Tebibyte>.    (I am looking foward to
>> buying 1 terabyte[1000 gigabytes] surplus memory). and the actual Ram 
>> only 40 bit addressing or just 1 terabyte of RA. 
>> But the registers and data width are 64 bits are they not.
>> I think the 40 and 48 restrictions are only for memory ops.  
>>
>
>
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